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Statevector-Referenced Geometry Survival of a Four-Qubit ZZ Quantum Kernel on IBM Quantum Hardware: A Fixed-Subset Diagnostic Across Three Execution Configurations

arXiv:2607.20377v1 Announce Type: cross Abstract: Quantum-kernel methods encode a dataset's geometry in a Gram matrix, so learning claims on hardware kernels assume the intended geometry survives exec

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23 Jul 2026

Search: “hardware”

A Controlled Diagnostic Study of Hardware-Induced Distortions in Hardware-Aware Training

Arch: An AI-Native Hardware Description Language for Register-Transfer Clocked Hardware Design

Leto: Fast In-Place Recovery for LLM Training on Surviving Hardware

Faithful and Complete LLM-Assisted Automated Construction of Hierarchical Hardware Knowledge Graphs

ViBE: Co-Optimizing Workload Skew and Hardware Variability for MoE Serving

Lock-in EP: An In-Situ Training Algorithm for Oscillatory Hardware

Coco: An Agentic Copilot for the Hardware--Software Co-Design Lifecycle

Machines that know they are aging: a framework for hardware-aware autonomous intelligence

Scalable On-Hardware Training of Quantum Neural Networks and Application to Clinical Data Imputation

LLMs for Secure Hardware Design and Related Problems: Opportunities and Challenges

RainFusion2.0: Temporal-Spatial Awareness and Hardware-Efficient Block-wise Sparse Attention

BEHAVE: Functional Behavior Modeling Enables Self-Improving Agents for Hardware Design and Verification

Precision-Aware Variable Bit Processing Elements for Hardware-Efficient Systolic Array Designs

Statevector-Referenced Geometry Survival of a Four-Qubit ZZ Quantum Kernel on IBM Quantum Hardware: A Fixed-Subset Diagnostic Across Three Execution Configurations

Hardware-Oriented Inference Complexity of Kolmogorov-Arnold Networks

Is Agentic AI Ready for Real-World Hardware Engineering? A Deep Dive with Phoenix-bench

FPGA-Based Hardware Architecture for Contrast Maximization in Event-Based Vision

Hardware-Efficient FPGA Implementation of Sigmoid Function Using Mixed-Radix Hyperbolic Rotation CORDIC

Focus Session: Hardware and Software Techniques for Accelerating Multimodal Foundation Models

Hardware Utilization and Inference Performance of Edge Object Detection Under Fault Injection

Hardware-Native Joint Sparse-Quantization for Trillion-Scale Mixture-of-Experts

ENAS: An Efficient Hardware-Aware Neural Architecture Search Framework for TinyML on Resource-Constrained Microcontrollers

SkyEgg: Heterogeneity-Aware Hardware Synthesis via Equality Saturation

Benchmarking AI Agents for Hardware Design Automation via MCP Tool Calling

NAS-Driven Hardware Accelerator Exploration for Edge AI and Quantization Effects on the Pareto Space

FQTree: Fine-grained Quantization and Hardware Generation of Boosted Decision Trees

Generative Models on Analog Hardware with Dynamics

Quantum Cinema: An Interactive Cinematic Exploration of Quantum Computing Hardware via Generative World Models

FP8 is All You Need (Part 1): Debunking Hardware FP64 as the HPC Holy Grail

Explainability Methods for Hardware Trojan Detection: A Systematic Comparison

Octopus Protocol: One-Shot Hardware Discovery and Control for AI Agents via Infrastructure-as-Prompts

ViM-Q: Scalable Algorithm-Hardware Co-Design for Vision Mamba Model Inference on FPGA

Agent Factories for High Level Synthesis: How Far Can General-Purpose Coding Agents Go in Hardware Optimization?

Algorithm and Hardware Co-Design for Efficient Complex-Valued Uncertainty Estimation

Robust Reasoning and Learning with Brain-Inspired Representations under Hardware-Induced Nonlinearities

AEG: A Baremetal Framework for AI Acceleration via Direct Hardware Access in Heterogeneous Accelerators

FreqSpaNet: Frequency and Spatial Learning of SFPF for Physical Layer Hardware Integrity Detection

KernelFoundry: Hardware-aware evolutionary GPU kernel optimization

Hardware-in-the-Loop Phase-Aware CNN for Real-Time 5G Channel Estimation

On the Performance of Malware Detection Classifiers Using Hardware Performance Counters

PUDA: An AI-Native Hardware Harness for Self-Driving Laboratories

Message Passing Based Two-Timescale Bayesian Learning for Joint Channel and Memory Hardware Impairments Tracking

Lie Group Diffusion Models for Hardware-Aware Quantum Circuit Synthesis

Smart Timing for Mining: A Deep Learning Framework for Bitcoin Hardware ROI Prediction

Hardware-Aware Neural Feature Extraction for Resource-Constrained Devices

Physical Foundation Models: Fixed hardware implementations of large-scale neural networks

HWE-Bench: Benchmarking LLM Agents on Real-World Hardware Bug Repair Tasks

Offline AI Modules: Voice-First Offline Architecture, Hardware Reference Stack, Quantization and Benchmarking