Search: “hardware”

arXiv:2512.23236v4 Announce Type: replace-cross Abstract: Making deep learning recommendation model (DLRM) training and inference fast and efficient is important. However, this presents three key syst

arXiv:2607.02630v1 Announce Type: cross Abstract: Hardware accelerators now sit on the critical path of online serving. GPUs, FPGAs, and increasingly remote services such as hardware security modules,

It's wild how quickly Etched designed and got the chips out, all within 2 years. They went deep, hardcoding attention into silicon and getting very high MFU. This kind of hardware tailored made for LL

arXiv:2606.01680v1 Announce Type: cross Abstract: Network failures are among the most frequent hardware faults in large-scale GPU clusters and a leading cause of training-job interruptions. Modern col

arXiv:2601.22813v2 Announce Type: replace Abstract: The NVFP4 lower-precision format, supported in hardware by NVIDIA Blackwell GPUs, promises to allow, for the first time, end-to-end fully-quantized

arXiv:2605.30359v1 Announce Type: cross Abstract: Generating high-performance GPU kernels remains challenging due to the need for both correctness and hardware-aware optimization. While large language

Gary Marcus discusses declining prices for NVIDIA's H100 and H200 AI chips, suggesting that inflated valuations and returns on investment for AI hardware customers are becoming unsustainable as the ma

arXiv:2605.21560v1 Announce Type: new Abstract: Deploying neural networks on microcontroller units (MCUs) is critical for edge intelligence but remains challenging due to tight memory, storage, and co

EDA Market size, Share, Business Models, Drivers, Changing Customer Base, Competitive Dynamics Across Synopsys, Cadence, and Siemens, China EDA, IP, Hardware, CoT, Lock-In Economics, Disruptive Forces

arXiv:2605.20799v1 Announce Type: cross Abstract: We present Overall FLOP Utilization (OFU), a hardware-level, precision-agnostic GPU efficiency metric for AI workloads on HPC systems, derived from tw

arXiv:2605.20179v1 Announce Type: new Abstract: Diffusion Large Language Models (dLLMs) have emerged as a competitive alternative to autoregressive (AR) models, offering better hardware utilization an

arXiv:2605.19593v1 Announce Type: new Abstract: Modern deployments of Large Language Models (LLMs) increasingly require serving multiple models with diverse architectures, sizes, and specialization on

arXiv:2605.17289v1 Announce Type: cross Abstract: Unstructured sparsity is now natively accelerated by recent GPU kernels and dataflow hardware, shifting the bottleneck from inference execution to the

arXiv:2412.12636v3 Announce Type: replace-cross Abstract: Large-scale ML training jobs are frequently interrupted by hardware and software anomalies, failures, and management events. Existing solution

arXiv:2605.14839v1 Announce Type: new Abstract: Traditional methods for classifying global navigation satellite system (GNSS) jamming signals typically involve post-processing raw or spectral data str

arXiv:2605.07985v1 Announce Type: cross Abstract: Selecting the optimal LLM inference configuration requires evaluation across hardware, serving engines, attention backends, and model architectures, s

Nvidia's stock rose 2.6% following news that xAI is selling 220,000 used GPUs on the secondhand market, potentially indicating a shift in AI hardware demand or xAI's operational priorities. The report

Llamacpp, when properly configured on Apple Silicon hardware, demonstrates robust performance and reliability for running language models. The tool can handle varied input requests effectively, making

AI compute resources should not be treated as interchangeable commodities, as different hardware configurations, providers, and architectures significantly impact training costs, inference latency, an

arXiv:2509.22166v4 Announce Type: replace-cross Abstract: The demand for efficient large language model (LLM) inference has intensified the focus on sparsification techniques. While semi-structured (N

Google announced Ironwood, its seventh-generation TPU that is twice as power efficient as the previous generation, alongside specialized hardware designed to support the emerging agentic AI era. Ironw

This article from SemiAnalysis analyzes the total cost of ownership for GPU clusters, likely covering hardware expenses, infrastructure requirements, power consumption, and operational overhead beyond

arXiv:2604.15475v1 Announce Type: new Abstract: Deploying learned multi-robot models on heterogeneous robots remains challenging due to hardware heterogeneity, communication constraints, and the lack

arXiv:2509.23638v2 Announce Type: replace Abstract: Mixture-of-Experts (MoE) models face memory and PCIe latency bottlenecks when deployed on commodity hardware. Offloading expert weights to CPU memor

arXiv:2507.01041v4 Announce Type: replace-cross Abstract: Split learning (SL) is a distributed learning paradigm that can enable computation-intensive artificial intelligence (AI) applications by part

arXiv:2604.11659v1 Announce Type: cross Abstract: Fully homomorphic encryption (FHE) has recently attracted significant attention as both a cryptographic primitive and a systems challenge. Given the l

arXiv:2604.11109v1 Announce Type: cross Abstract: As high-performance computing and AI workloads become increasingly dependent on GPUs, maintaining high performance across rapidly evolving hardware ge

arXiv:2601.02624v2 Announce Type: replace-cross Abstract: The growing complexity of modern system-on-chip (SoC) and IP designs is making security assurance difficult day by day. One of the fundamental

arXiv:2604.07013v1 Announce Type: cross Abstract: Designing quantum neural networks (QNNs) that are both accurate and deployable on NISQ hardware is challenging. Handcrafted ansatze must balance expre

arXiv:2608.10506v1 Announce Type: cross Abstract: Accurate pre-deployment estimation of CNN inference cost--energy, latency, and peak memory--is increasingly critical as models are deployed on resourc

arXiv:2608.10795v1 Announce Type: new Abstract: Successful mutation strategies in evolutionary code search may contain reusable knowledge that is useful beyond a single run, and in some cases may tran

arXiv:2608.08469v1 Announce Type: new Abstract: Existing streaming multimodal models process observations incrementally but still follow a turn-based prefill-then-decode pattern, making them non-duple

Been benchmarking DSv4 Flash 0731 on a Flow Z13 (Ryzen AI MAX+ 395, Radeon 8060S / gfx1151, 128GB LPDDR5X) for the past week. Figured I'd share what actually works and what doesn't — there are a lot o

arXiv:2608.08285v1 Announce Type: new Abstract: We present Ego-OSCAR, an open-hardware, low-cost, head-mounted stereo-inertial capture device for egocentric data collection in the wild. EgoOSCAR pairs

🦔Nvidia announced agreements yesterday with the six biggest names in private capital, Apollo, Blackstone, BlackRock, Brookfield, Goldman Sachs, and KKR, to raise over $500 billion so its own customers

arXiv:2608.06803v1 Announce Type: cross Abstract: Ising machines are emerging as promising hardware for combinatorial optimization. With recent advances in CMOS Ising technology, they are becoming att

Ultra-High Interactivity on NVIDIA GPUs? TileRT InferenceX Can TileRT software on NVIDIA GPU compete with Cerebras, Groq LPU, SambaNova? Batch Size 1, Disaggregated engine, High throughput prefill eng

arXiv:2608.04502v1 Announce Type: cross Abstract: Attention--Feed-Forward Network (FFN) Disaggregation (AFD) is emerging as a promising architecture for serving Mixture-of-Experts (MoE) language model

arXiv:2602.11506v4 Announce Type: replace-cross Abstract: The transition toward localized intelligence through Small Language Models (SLMs) has intensified the need for rigorous performance characteri

arXiv:2603.16548v2 Announce Type: replace-cross Abstract: In light of globalized hardware supply chains, the assurance of hardware components has gained significant interest, particularly in cryptogra

arXiv:2607.26181v1 Announce Type: new Abstract: Functional verification dominates integrated circuit (IC) front-end engineering effort, and a single missed bug that escapes to silicon can trigger a co

arXiv:2607.22997v1 Announce Type: cross Abstract: Physical AI -- the integration of large vision-language-action (VLA) models with embodied agents that act in the real world -- has emerged as the next

arXiv:2607.20518v1 Announce Type: new Abstract: AI agents are now capable of writing, compiling, and iteratively optimizing low-level operator kernels on different hardware platforms. Existing benchma

arXiv:2607.20045v1 Announce Type: cross Abstract: Physical noise in near-term quantum hardware is usually treated as a nuisance to suppress. We ask whether it can instead act as a hardware-native regu

arXiv:2606.17471v3 Announce Type: replace Abstract: Traditional CPU, GPU, and NPU architectures are increasingly limited by the von Neumann bottleneck. While In-Memory Computing (IMC) using ReRAM cros

arXiv:2602.07400v2 Announce Type: replace Abstract: Gradient-based LUT- and logic-gate-based neural networks (LUTNet, LogicNets, DiffLogic, PolyLUT, NeuraLUT, WARP-LUT, DWN, LILogicNet, LightLUT) repl